This condition occurrs when the received Clock ID in the received pdelay Response message (rcvdPdelayRespPtr->requestingPortIdentity.clockIdentity) is not equal to the switches Clock ID (thisClock). The MDPdelayReq state machine transitions from the WAITING_FOR_PDELAY_RESP to the RESET state as described in figure 11-8 of the IEEE 802.1AS-2001 document. Note - this message is only recorded when the number of lost Responses is greater or equal to allowed lost responses as defined in the RESET state.
No action required - Informational message only.
Debug-Verbose
asCapable is %asCapable% => 0, port = %port%: rcvdPdelayRespPtr->requestingPortIdentity.clockId (%rcvClock%) != thisClock (%thisClock%): lostResponses = %lostResponses%: allowedLostResponses = %allowedLostResponses%: transition WAITING_FOR_PDELAY_RESP to RESET state
Name | Type |
---|---|
asCapable | uInt |
port | SlotPort |
rcvClock | String |
thisClock | String |
lostResponses | uInt16 |
allowedLostResponses | uInt16 |